With the increasing integration degree of semiconductor devices, circuit patterns of LSI elements are becoming finer. To make the pattern finer, it is required not only to reduce the line width but also to improve the dimensional accuracy and positional accuracy of the pattern. Also for memory devices, it is required to retain a certain amount of charge necessary for memory in a smaller region in a minute cell.
As a technology to overcome such a problem, there is a nonvolatile memory device in which a memory cell is formed using a resistance change layer. The nonvolatile memory device has a three-dimensionally stacked structure, and can therefore increase the integration degree as compared to memory cells utilizing a two-dimensional plane. As the integration degree is increased, such a nonvolatile memory device is required to have higher reliability.